YAML Schema

BLADE is driven by a description of the design written in a custom YAML schema. Different tags address different needs, for example !Mod details a module with a name, ports, child modules, and interconnections while !His defines an interconnect type which can carry multiple signals with different roles.

This section of the documentation details each schema tag, along with examples of how they may be used.

Tags

  • !Config - specifies the order of groups within a register set.

  • !Connect - defines interconnectivity between ports and constant values.

  • !Const - describes a constant value tie for a port.

  • !Define - overrides parameters of !Reg and !Field tags at instantiation

  • !Def - defines a named value that can be used throughout the design.

  • !Enum - discretises a register field into named integer integers.

  • !Field - breaks a register’s width up into meaningful sub-divisions.

  • !Group - declares a register group

  • !His - a complex interconnect declaration

  • !HisRef - instantiating of an interconnect as a port or component

  • !Initiator - identifies address map accessible from a certain port

  • !Inst - used to describe a microcode instruction set

  • !Macro - instantiates a macro type register group

  • !ModInst - instantiates a !Mod as a child of another block

  • !Mod - declaration of a module with ports and submodules

  • !Point - identifies a boundary port on a module or sub-module

  • !Port - a simple component of an interconnect

  • !Register - instantiates a normal register group (non-macro)

  • !Reg - declares a single register within a group

  • !Target - specifies window in the address map to access a certain port

Deprecated Tags

The following tag types have been deprecated, but support has not yet been fully removed from BLADE. Do not use these tag types in new designs.

  • !File - creates a new requirements document.

  • !Req - declares a requirement.

  • !Spec - declares a specific document.

  • !Unroll - internal tag used by previous version of tool.

  • !Map - declared mapping between Verilog and BLADE components.

Warning

Support for these tag types may be wholly or partially missing from BLADE’s elaboration engine, however it will consume them in order to maintain compatibility with older designs. They will be fully removed in future revisions.