!His

The !His tag defines an interconnect type, which can carry multiple signals between a nominated ‘master’ and ‘slave’. Signals within the interconnect can travel in either direction (i.e. from master to slave, or from slave to master), allowing complex bus connections to be expressed as a single port.

Each component of the !His can be a primitive signal, with a specified width (!Port), or it can be a reference (!HisRef) to another !His.

As every component, and indeed any sub-components when using a (!HisRef, can have a different role, the net role of each signal must be resolved recursively. For example:

MyHis [M-->S]
 |-- MyCompA [M-->S]
 |    |-- MySubCompA1 [M<--S]
 |    |-- MySubCompA2 [M-->S]
 |-- MyCompB [M<--S]
      |-- MySubCompB1 [M-->S]
      |-- MySubCompB2 [M<--S]

This arrangement results in the following net roles:

Signal Direction
MyHis.MyCompA.MySubCompA1 M<--S
MyHis.MyCompA.MySubCompA2 M-->S
MyHis.MyCompB.MySubCompB1 M<--S
MyHis.MyCompB.MySubCompB2 M-->S

Warning

BLADE currently supports an attribute of role on a !His defintion - when set to slave it effectively reverses all of the logic when creating a port. However, this is unnecessary complication as you could instead change the role of the port on your block. As such, this attribute will be deprecated in the near future.

Usage

- !His
  name : channel
  ld   : Describes a data transmission channel with valid and acknowledgement
  ports:
  - !Port [valid,  1, "Valid signal",    1, 0, Master]
  - !Port [ack,    1, "Acknowledgement", 1, 0, Slave ]
  - !Port [data,  32, "Data carried",    1, 0, Master]

- !His
  name : bidirectional_bus
  ld   : A bus carrying two channels with channel enable signals
  ports:
  - !HisRef [outbound, channel, "Transmit bus",   1, Master]
  - !HisRef [inbound,  channel, "Receive bus",    1, Slave ]
  - !Port   [enable,         1, "Channel enable", 2, Master]
class blade.schema.ph_his.His(name, ports, sd='', role='MASTER', ld='', options=[], includes=[])

!His tag schema class for describing an interconnect with components

__init__(name, ports, sd='', role='MASTER', ld='', options=[], includes=[])

Initialisation for the !His YAML tag

Parameters

  • name – Name of the !His, used when declaring a port of this type

  • ports – List of either !HisRef or !Port tags which will be carried as components within this interconnect

  • sd – Short description of the interconnect - maximum 150 characters

  • role – Declares the overall role for this interconnect, effectively reversing whatever role it is declared as (to be deprecated)

  • ld – Long description of the interconnect

  • options – List of options either in the form ‘KEY=VAL’ or just ‘KEY’ if a value is not required.

set_file_marks(start, end)

Set start and end marks of the declaration and propagate to children

Parameters

  • start – The starting mark

  • end – The ending mark

set_source_file(file)

Set the source file of this object and propagate it to children.

Parameters

file – The source file path or object

validate()

Check that this tag agrees with our YAML schema